A conventional dual in-line memory module (DIMM) is implemented as a set of dynamic random access memory (DRAM) integrated circuits mounted on a printed circuit board. For example, dual data rate (DDR) DIMMs use a set of DRAM memory elements that are coupled to a memory bus by a high-bandwidth interface. Different generations of DIMMs, such as DDR, DDR2, DDR3, and DDR4, are characterized by different pin counts, notch positions, signaling voltages, timings, and the like, which are defined by corresponding standards established by the Joint Electron Device Engineering Council (JEDEC) Solid State Technology Association. For example, a DIMM that operates according to the DDR4 standards uses synchronous DRAM (SDRAM) to provide up to 512 gigabytes (GB) of memory that are accessible at frequencies between 800 and 4,266 megahertz (MHz) and operate at voltages between 1.2 volts and 1.4 volts. The DRAM elements in a DIMM do not maintain the stored data once power has been removed or falls below a threshold required to maintain data integrity in the DRAM. Moreover, the memory access latency of a conventional DIMM is deterministic, e.g., the number of cycles between sending a read request to the DIMM and receiving the requested information at the requesting processor is a predetermined, known value.